DocumentCode :
3713209
Title :
Power optimization approach of ORCA processor for 32/28nm technology node
Author :
Davit Babayan
Author_Institution :
National Polytechnic University of Armenia, Synopsys Armenia CJSC, Yerevan, Armenia
fYear :
2015
Firstpage :
11
Lastpage :
14
Abstract :
This paper presents a method of power optimization implemented on RISC architecture ORCA processor with the help of power gating approach aimed at significant reduction of leakage power consumption. Presented approach results significantly decrease both dynamic and leakage power of ORCA processor when used in combination with multi-voltage power reduction method.
Keywords :
"Reduced instruction set computing","Clocks","Registers","Standards","SDRAM","Timing","Optimization"
Publisher :
ieee
Conference_Titel :
Computer Science and Information Technologies (CSIT), 2015
Type :
conf
DOI :
10.1109/CSITechnol.2015.7358241
Filename :
7358241
Link To Document :
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