Title :
A programmable low dropout regulator for delay correction network in DPWM
Author :
Jada Harshil;Anil Kumar Gupta
Author_Institution :
School of VLSI design and Embedded system, National Institute of Technology Kurukshetra, India
Abstract :
This paper presents a programmable low dropout regulator (LDO) with high PSRR. A programmable reference voltage required for LDO regulator has been implemented using a 5-bit digital to analog converter made of capacitive voltage divider network. The LDO regulator´s PSRR performance is enhanced using a feed forward circuit. The output voltage of proposed LDO regulator has 32 discrete voltage levels in the range 1-1.2 V for load current in the range 100 μA to 5 mA. The PSRR of the proposed circuit is 89dB. The LDO regulator was designed in UMC 180nm technology. The proposed LDO regulator works with a supply voltage of 1.6 V and has a quiescent current of 23 μA. It can be used for delay matching in DPWM by changing supply voltage of delay elements.
Keywords :
"Regulators","Delays","Voltage control","Transistors","Feeds","Mathematical model","Power supplies"
Conference_Titel :
Reliability, Infocom Technologies and Optimization (ICRITO) (Trends and Future Directions), 2015 4th International Conference on
DOI :
10.1109/ICRITO.2015.7359345
