DocumentCode :
3714932
Title :
A multi-bin constant throughput CABAC decoder for HEVC
Author :
Hsuan-Ku Chen; Chih-Chung Fang;Tian Sheuan Chang
Author_Institution :
Dept. Electronics Engineering, National Chiao Tung University, Taiwan
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
This paper proposes a CABAC decoder for HEVC that achieves constant high throughput multi-bin decoding with the parallel syntax element parser to solve the dependency problem in the traditional prediction based multi-bin architecture. The hardware implementation with TSMC 90nm CMOS technology can process 1 bins per cycles with 48,430 gate count (270Mbins/sec,) or 3 bins per cycle with 209,422 gate count (810Mbins/sec) when operating at 270MHz.
Keywords :
"Decoding","Context","Throughput","Syntactics","Computer architecture","Conferences","Pipelines"
Publisher :
ieee
Conference_Titel :
Applied Electrical Engineering and Computing Technologies (AEECT), 2015 IEEE Jordan Conference on
Print_ISBN :
978-1-4799-7442-9
Type :
conf
DOI :
10.1109/AEECT.2015.7360544
Filename :
7360544
Link To Document :
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