DocumentCode :
3715964
Title :
BIT loading in MIMO-PLC systems with the presence of interference
Author :
Thanh Man Vo;Karine Amis;Thierry Chonavel;Pierre Siohan
Author_Institution :
Telecom Bretagne / UMR CNRS 6285 Lab-STICC
fYear :
2015
Firstpage :
899
Lastpage :
903
Abstract :
In broadband indoor power line communication (PLC) sys tems, multiple input multiple output (MIMO) techniques have been introduced to address the increasing demand for high data rates under the constraint of limited allocated bandwidth. Whereas the self inter-antenna interference can be dealt with on each subcarrier, both inter-carrier and inter-symbol interference can occur yielding sub-optimal bit loading if not con sidered. In this paper, we extend to the MIMO case the low-complexity bit/power allocation algorithm, called Reduced Complexity Algorithm (RCA), that we previously applied to the SISO case. Based on the Greedy principle, the RCA takes the interference into account to optimize the bit loading. We consider two MIMO schemes: optimum eigen beamforming and spatial multiplexing. Simulation results show the efficiency of the RCA in terms of throughput and computation cost in both cases.
Keywords :
"Interference","MIMO","Complexity theory","Loading","Throughput","Transmitting antennas","Resource management"
Publisher :
ieee
Conference_Titel :
Signal Processing Conference (EUSIPCO), 2015 23rd European
Electronic_ISBN :
2076-1465
Type :
conf
DOI :
10.1109/EUSIPCO.2015.7362513
Filename :
7362513
Link To Document :
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