Title :
Executing secured virtual machines within a manycore architecture
Author :
Cl?ment D?vigne;Jean-Baptiste Br?jon;Quentin Meunier;Franck Wajsb?rt
Author_Institution :
Sorbonne Universit?s UPMC Univ Paris 06, CNRS, LIP6 UMR 7606 4 place Jussieu 75005, France
Abstract :
Manycore processors are a way to face the always growing demand in digital data processing. However, by putting closer distinct and possibly private data, they open up to security breaches. This article presents undergoing work aiming at providing security guaranties to different users utilizing different cores in a manycore architecture. The proposed solution is using physical isolation and a hypervisor with minimum rights, although the work described in the paper focuses only on hardware mechanisms. We present a hardware module providing an address translation service allowing to fully virtualize operating systems, while offering advantages compared to a classical memory management unit within our context. Experiments made on a virtual prototype shows that our solution has a low time overhead - typically 3% on average.
Keywords :
"Virtual machining","Computer architecture","Hardware","Random access memory","Virtual machine monitors","Program processors","Security"
Conference_Titel :
Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015
DOI :
10.1109/NORCHIP.2015.7364380