Cu pillar bump flip chip package development for advanced node chip

In this work, the 14 nm CPI (Chip and Package Interaction) challenges, development and qualification were investigated by using 130 um pitch Cu pillar bump in flip chip BGA package without heat spreader. We evaluated 14 nm BEOL film strength and adhesion in the torture tests. After passing the torture tests, the package is evaluated in the CPI reliability tests following the JEDEC standard. We optimized the package structure, process and BOM (Bill of Materials) to find compatible package solutions and checked the robustness of die seal ring structure. After the reliability tests, SAM (Scanning Acoustic Microscope) and typical electrical test were conducted to confirm any failures. Moreover, SEM (Scanning Electron Microscope) and FIB (Focused Ion Beam) were used to confirm the defect mode. A 3D thermal-mechanical finite element model was built to analyze the stress field for early material assessment, selection and structure optimization. The simulation results revealed that larger bump, small PI opening, and high Tg (Glass Transition Temperature) underfill reduced more stress on BEOL film stack. CPI formal qualification showed all samples passed reliability tests and no side-wall crack, bump / ULK crack and delamination after assembly process and CPI tests. We have successfully demonstrated the CPI solution for 14 nm chip using Cu pillar bump in flip chip package.