Improved QFN Reliability by flank tin plating process after singulation

The process of singulating IC packages such as Quad Flat Pack No-Lead (QFNs) by either a sawing or punching operation results in exposed copper on the sidewalls. This exposed copper surface can oxidize leading to poor or no solder wetting up the sidewall during the assembly operation. The consequence of this oxidized copper surface is either incomplete or no solder fillet formation during the PCB mounting operation resulting in solder joint reliability concerns. Currently, JEDEC and IPC assembly standards do not specify a toe fillet for assembly. However, several component manufacturers have requested a toe fillet solderability process which would improve current QFN reliability by ensuring toe fillet solder coverage. A process whereby tin is plated on the copper sidewall of the QFN after singulation has been developed to improve toe fillet solderability. Several assembly studies have been conducted which demonstrate improved QFN reliability due to the use of this toe fillet solderability process. The plating process, toe fillet inspection and improved QFN reliability after assembly due to the use of this toe fillet solderability is described.