Bandwidth and power adaptive receiver amplifier design for optical communications in 80 nm CMOS

In order to extend the battery life time of mobile devices, power consumption should be reduced in case of a transmission at lower data rate (DR). In optical receiver frontends the limiting or main amplifier (LA/MA) is one of the largest power consumers. This paper presents a LA/MA topology where the power can be scaled down while the gain is kept constant when lower bandwidth is required for the transmission. The concept is implemented in 80 nm CMOS. Measurements show a 50 % decrease of power consumption in limiting operation when switching from the high-performance and high-power (HP) mode, where 16 Gbps transmission is possible at a bit error rate (BER) of 10-12 and with 0.6 pJ/bit, to the low-performance and low-power (LP) mode where a DR of 10 Gbps is possible with only 0.48 pJ/bit. The adaptive LA/MA, realized with a third-order interleaving feedback circuit keeps the gain constant in linear operation as well, as shown by small-signal measurements.