A high efficiency inverter design for Google little box challenge

This paper proposed a high efficiency standalone inverter design for Google Little Box Challenge (LBC). A full bridge inverter is designed with two high frequency legs and one low frequency leg. To improve the system efficiency, asymmetrical unipolar modulation is utilized and interleaved switching is used. The synchronization between high switching frequency leg and low switching frequency leg is studied and implemented based on a TI micro-controller, which minimized the zero-crossing distortion on the output voltage waveform. A prototype hardware utilizing GaN devices has been developed and tested. A peak efficiency with 99.30% and a CEC efficiency with 99.26% are both achieved.