A novel dual pipeline ultrafast real-time ‘Ripple sort’ algorithm and circuit implementation

This paper describes the, design, simulation and implementation of a novel Ultra-fast `ripple´ Sorting algorithm. It comprises a dual pipelined, ripple based hardware for sorting numerical data, which can used for real-time applications. The ripple algorithm begins sorting or ranking immediately upon arrival of data at the input. Unlike other sorting algorithms, it does not require storage of all incoming data prior to starting the sorting process. Most significantly the outcome of the Sorting process is deterministic, irrespective of the order in which the data arrives at the input. The presented technique is extremely fast due to the systematic approach resulting in one clock cycle for processing, propagating and storing all incoming samples. Each sample is systematically rippled down via multiple pipelined processing blocks. The entire pipeline is processed simultaneously per clock cycle basis.