A interleaved three-level half-bridge ZVZCS dc-dc converter using phase-shifted pulse-width modulation

This research paper presents an interleaved three-level half-bridge ZVZCS dc-dc converter by using the interleaved technique for reducing the ripple current of the proposed converter and using the dc blocking capacitor for achieving the soft switching condition. The outer switches of each cell can achieve the ZVS condition while the inner switches can operate under the ZCS condition. In addition, the voltage stress on devices (MOSFETs) equals to a half of input voltage because of using the three-level circuit. Finally, the operation modes and simulation results by PSIM software are illustrated in detail in order to confirm the validity of proposed concept.