Logic architecture for 2-select arbiter using duel pointer

Arbitration among various clients, requesting multiple resources simultaneously in high throughput system, needs multiple requests selection in single cycle. A new technique for implementation of arbiter, which selects up to two active request is proposed in this paper. 2 selector circuits are designed by modification of existing parallel prefix tree structures for architecture. Design maintains fairness among active requests by updating pointers according to grant selection algorithm presented. Simulation of design and comparison with previously work is done in terms of area and timing results.