Design and implementation of SAR ADC for Time-to-Digital Converter application

Time-to-Digital Converter (TDC) has been widely used in several applications such as time-of-flight measurement, high-energy physics experiment and bio-medical imaging. There are two generations of TDC implementation. In this paper we propose a SAR ADC design which has been adapted as a building block of the first generation of TDC. Design and simulation performed with 180nm CMOS technology, Our design could obtained +0.125 / -0.75 DNL, + 0.75 / -1 INL, 844.2uW power consumption and 10-bit output.