A 2.4 GHz passive wake-up circuit for power minimization in wireless sensor nodes

Power consumption of the sensor node (SN) is a critical issue. A SN drains-out its moderately powerful batteries (AA) of 1500 mAh in just a few days, while the power requirement of wireless sensor network applications is of the order of few years. So an important question is: “how to prolong the network lifetime?”. This article presents a prototype of passive wake-up circuit (PWUC) to minimize the power consumption by the SNs during the idle listening mode. The PWUC consists of an antenna, impedance matching circuitry and rectifier. Very few authors have proposed the PWUCs and most of them operate in European frequency bands (like 868 MHz) and these cannot be deployed in the Indian context of open band. The designed PWUC operates as per Indian frequency spectrum regulations and provides an output power of 3.2 μW (output voltage: 1.8 V & output current: 1.8 μA) for an input power of -19 dBm. This amounts to conversion efficiency of 25 %. The UMC 0.18 μm CMOS process is used to realize Rectifier, while standard off-the-shelf components are used to realize matching circuitry.