A systolic architecture based GF (2m) multiplier using modified LSD first multiplication algorithm

This paper presents GF(2m) multiplier for trinomials. Multiplier is implemented using digit serial/parallel architecture. Architecture is constructed using modified LSD-first multiplication algorithm. Bit throughput is a critical factor of GF(2m) multiplication for different applications.Applications such as digital signal processors, computer systems, FIR filter implementation. This architecture achieves latency of m/d clock cycles along with high bit throughput such as m-bits per clock cycles. Whereas, m is no. of input bits of each operand. And d is selected digit size. m is always greater than d.