• DocumentCode
    3725673
  • Title

    Design of a novel regulated cascode current mirror

  • Author

    Devendra Jakhar;Gaurav Saini

  • Author_Institution
    School of VLSI Design & Embedded Systems National Institute of Technology Kurukshetra, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, a novel regulated cascode current mirror is proposed. In proposed structure cascode stage is used to enhance the output impedance of existing regulated cascode current mirror. A feedback loop is used to stabilize the output current. Output impedance of proposed circuit is three times improved and power dissipation is same as existing regulated cascode current mirror at the cost of high systematic gain error. The output current is mirrored with a transfer error less than 1% when the input current is increased from Zero to Twenty micro ampere that´s why the proposed circuit can be used for low power application.
  • Keywords
    "Mirrors","Impedance","Transistors","Power dissipation","Systematics","Mathematical model","Logic gates"
  • Publisher
    ieee
  • Conference_Titel
    Computer, Communication and Control (IC4), 2015 International Conference on
  • Type

    conf

  • DOI
    10.1109/IC4.2015.7375599
  • Filename
    7375599