Implementation of a software defined FM mixed demodulator on FPGA

Software defined radio (SDR) applications are usually preferred in low power flexible communication systems. In this paper, a software defined Frequency Modulation (FM) demodulator is presented. Mixed demodulation technique is used to build a digital FM demodulator which has 16 MHz sampling rate. Proposed system was implemented successfully on a Field Programmable Gate Array (FPGA). The system uses 1247 logic elements. FPGA´s power consumption is 113.56 mW. The system was tested and verified with a test bed including Analog Digital Converter (ADC) and Digital Analog Converter (DAC).