• DocumentCode
    3727277
  • Title

    Coplanar QCA serial adder and multiplier via clock-zone based crossover

  • Author

    Dariush Abedi;Ghassem Jaberipur

  • Author_Institution
    Department of Computer Science and Engineering, Shahid Beheshti University, Tehran 1983963113, Iran
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The Quantum-dot Cellular Automata represents one of the newest technologies that is emerging as possible replacement for CMOS. In this paper, we design a QCA serial adder (QSA) that leads to less cell count and area at no delay penalty. The latest proposed layout for QCA full adders, which uses a coplanar clock-zone based crossover design, is employed here. We further explore the design of serial-parallel multipliers based on the proposed QSA. Evaluations are based on the QCA-specific cost function and conventional measures, where the simulation results indicate that our designs achieve remarkable improvement in comparison to the best previous relevant works. Verification and simulations are carried out by QCADesigner.
  • Keywords
    "Layout","Computer architecture","Adders","Microprocessors","Clocks","Delays"
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture and Digital Systems (CADS), 2015 18th CSI International Symposium on
  • Type

    conf

  • DOI
    10.1109/CADS.2015.7377791
  • Filename
    7377791