Title :
High-speed, low-power subranging ADCs
Author_Institution :
Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan
Abstract :
In this paper, the latest research results of high-speed, low-power subranging ADC technologies are presented. The offset cancelling charge steering amplifier realizes a low-power and high-precision comparator, resulting in a low-power subranging ADC without digital calibration. Moreover, the built-in threshold calibration combining offset drift compensation enables an extremely low-power subranging ADC that is equally matched for SAR ADCs.
Keywords :
"Calibration","Threshold voltage","Resistors","Very large scale integration","CMOS integrated circuits","Capacitors","Power demand"
Conference_Titel :
Radio-Frequency Integration Technology (RFIT), 2015 IEEE International Symposium on
DOI :
10.1109/RFIT.2015.7377924
