DocumentCode :
3728047
Title :
On the Design of a Fault-Tolerant Photonic Network-on-Chip
Author :
Michael Conrad Meyer;Akram Ben Ahmed;Yuki Tanaka;Abderazek Ben Abdallah
Author_Institution :
Adaptive Syst. Lab., Grad. Sch. of Comput. Sci. &
fYear :
2015
Firstpage :
821
Lastpage :
826
Abstract :
Optical Network-on-Chip is a solution to for power and throughput bottlenecks of current technology. The higher bandwidth is achieved by the light speed transmissions, and the power required to transmit data in the optical domain is much lower. This is a disruptive technology solution to problems arising from silicon-based computing. In this paper, we present a fault-tolerant optical router (FTTDOR) with its electrical control module towards the design of a highly-reliable low-power three dimensional Networks-on-Chip (PHENIC). FTTDOR uses redundancy only in critical locations, to assure accuracy of the packet transmission even after a faulty ring resonator appears. The proposed optical router is decomposed non-blocking, with minimal ring resonators, and requires no resonators for straight travel (East to West, North to South, and Up to Down, as well as their inverses). Simulation results show that the network can maintain a 98% throughput after 3% faults, and 89% after 20% faults. These results come with a reduction of micro-ring resonators to 65% of the amount present in a conventional crossbar router. Simulation of the electrical control module and router show that it has a total area of around 20,000 μm2 and consumes 3.8mW at 600MHz.
Keywords :
"Optical ring resonators","Optical switches","Circuit faults","Routing","Fault tolerance","Fault tolerant systems","Integrated optics"
Publisher :
ieee
Conference_Titel :
Systems, Man, and Cybernetics (SMC), 2015 IEEE International Conference on
Type :
conf
DOI :
10.1109/SMC.2015.152
Filename :
7379284
Link To Document :
بازگشت