DocumentCode
3729218
Title
Design of digit serial FIR Filter for power optimization
Author
Samidha Shirish Pusegaonkar;Vipin S. Bhure
Author_Institution
Dept. of Electronics, G.H.Raisoni Academy of Engineering and Technology, Nagpur, India
fYear
2015
Firstpage
452
Lastpage
457
Abstract
The low power digital FIR Filter depending on digit serial adder and multiple constant multiplier (MCM) is explained in this paper. Digit serial architecture offers optimum area and does not dependent on word length. Paper developing a digit serial adder and MCM and presents the exact formalization of power optimization. Research work output indicate the power of the proposed filter is optimized.
Keywords
"Optimization","Filtering algorithms","Adders","Yttrium"
Publisher
ieee
Conference_Titel
Green Computing and Internet of Things (ICGCIoT), 2015 International Conference on
Type
conf
DOI
10.1109/ICGCIoT.2015.7380506
Filename
7380506
Link To Document