Title :
Design of digit serial FIR Filter for power optimization
Author :
Samidha Shirish Pusegaonkar;Vipin S. Bhure
Author_Institution :
Dept. of Electronics, G.H.Raisoni Academy of Engineering and Technology, Nagpur, India
Abstract :
The low power digital FIR Filter depending on digit serial adder and multiple constant multiplier (MCM) is explained in this paper. Digit serial architecture offers optimum area and does not dependent on word length. Paper developing a digit serial adder and MCM and presents the exact formalization of power optimization. Research work output indicate the power of the proposed filter is optimized.
Keywords :
"Optimization","Filtering algorithms","Adders","Yttrium"
Conference_Titel :
Green Computing and Internet of Things (ICGCIoT), 2015 International Conference on
DOI :
10.1109/ICGCIoT.2015.7380506
