• DocumentCode
    3730074
  • Title

    High performance FPGA implementation of Data encryption standard

  • Author

    Murtada. M. Abdelwahab

  • Author_Institution
    Electronic Engineering Department - Faculty of Engineering & Technology, University of Gezira - Sudan
  • fYear
    2015
  • Firstpage
    37
  • Lastpage
    40
  • Abstract
    The proposed cryptographic system represents a compact data encryption algorithm (DEA). The implementation provides a short path of encryption and consists of single round. It used only 303 slice and achieved throughput of 278.282 Mbps. The results are shown in the form of chip area performance and performance/slice. The results are compared graphically with similar encryption implementations and founded very competitive.
  • Keywords
    "Encryption","Field programmable gate arrays","Algorithm design and analysis","Software algorithms","Standards","Throughput"
  • Publisher
    ieee
  • Conference_Titel
    Computing, Control, Networking, Electronics and Embedded Systems Engineering (ICCNEEE), 2015 International Conference on
  • Type

    conf

  • DOI
    10.1109/ICCNEEE.2015.7381424
  • Filename
    7381424
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3730074