DocumentCode :
3730642
Title :
Design for a reconfigurable image fusion system base on All Programmable System on Chip
Author :
Xiujie Qu; Shixin Zhang; Haili Huo; Yue Gu; Yue Sun
Author_Institution :
School of Information and Electronics, Beijing Institute of Technology, China
fYear :
2015
Firstpage :
1903
Lastpage :
1907
Abstract :
This paper proposes a complete hardware and software solution of an image fusion system, which is based on All Programmable System on Chip (AP-SoC) platform. We adopt the modular reconfigurable ideology to divide image processing into two basic modules, which are used for image convolution and point operation. We take advantage of the low-delay and high-performance of data port to exchange data between memory and modules through Direct Memory Access (DMA) in order to realize the system´s real-time. Now we have implemented 5 layers Laplacian fusion system on XC7Z020 AP-SoC to verify the designed modules and system validity. The frame rate of the system reaches 34fps. Our solution is highly flexible and reconfigurable, which can implement any layers of image fusion by only modifying software and integrate a pipeline fusion system with different levels on the basis of applicative requirement and resource limitation.
Keywords :
"Convolution","Image fusion","Laplace equations","Hardware","Clocks","Signal processing algorithms","Software"
Publisher :
ieee
Conference_Titel :
Fuzzy Systems and Knowledge Discovery (FSKD), 2015 12th International Conference on
Type :
conf
DOI :
10.1109/FSKD.2015.7382238
Filename :
7382238
Link To Document :
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