A 4-Bit Bit-Slice Multiplier for a 32-Bit RSFQ Microprocessor

A 4-bit bit-slice multiplier for a 32-bit rapid single-flux-quantum (RSFQ) microprocessor is proposed. It carries out both signed and unsigned integer multiplication. A fully pipelined RSFQ logic design of the multiplier using concurrent flow clocking consists of 33 stages and 17,551 Josephson junctions. The bit-slice approach simplifies the circuit complexity and reduces the hardware cost. For verification, an 8×8-bit 4-bit bit-slice multiplier based on the proposed algorithm has been designed and simulated using AIST 10-kA/cm² 1.0-μm fabrication technology. The simulation result shows correct operation at 62.5 GHz.