DocumentCode
3731499
Title
Design and High-Speed Component Tests of an SFQ FFT Processor Using the 10 kA/cm² Nb Advanced Process
Author
Y. Sakashita;T. Ono;Y. Yamanashi;N. Yoshikawa
Author_Institution
Dept. of Electr. &
fYear
2015
fDate
7/1/2015 12:00:00 AM
Firstpage
1
Lastpage
3
Abstract
We are developing a high-speed FFT processor using single- flux-quantum (SFQ) logic circuits. In our previous studies we have designed and demonstrated a 4-bit butterfly processor using the AIST 10 kA/cm2 Nb Advanced Process 2 (ADP2) at the frequency of 51.6 GHz, which is the main circuit of the FFT processor. In this study, we investigated the architecture of the SFQ FFT processor. We also designed the component circuits for on-chip SFQ FFT system using ADP2. We demonstrated the component circuits, the data-shuffling circuit and twiddle factor ROM for 4-bit 8-point FFT at the maximum frequency of 59.5 GHz and 51.5 GHz, respectively. The calculation time for a 32-bit 1024-point FFT using a pipelined SFQ FFT processor was estimated to be 6.2 μs.
Keywords
"Read only memory","Niobium","System-on-chip","Yttrium","Computer architecture","Clocks","Hardware"
Publisher
ieee
Conference_Titel
Superconductive Electronics Conference (ISEC), 2015 15th International
Type
conf
DOI
10.1109/ISEC.2015.7383442
Filename
7383442
Link To Document