DocumentCode
3731502
Title
Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic
Author
Q. Xu;Y. Yamanashi;C. L. Ayala;N. Takeuchi;T. Ortlepp;N. Yoshikawa
Author_Institution
Dept. of Electr. &
fYear
2015
fDate
7/1/2015 12:00:00 AM
Firstpage
1
Lastpage
3
Abstract
We designed and implemented an extremely energy- efficient hardware algorithm using adiabatic quantum- flux-parametron (AQFP) logic based on a hardware- algorithm known as the Collatz conjecture. The circuit is composed of mergers, odd- even check stages, path controllers, processing units, terminating stages, together with a feedback loop. This design is at least 3 orders of magnitude better in energy efficiency compared to rapid-single-flux-quantum (RSFQ) designs and is superior to semiconductor-based designs even when including the power dissipation of a cryocooler.
Keywords
"CMOS integrated circuits","Integrated circuit modeling","Logic gates","Energy efficiency","Hardware","Process control","Feedback loop"
Publisher
ieee
Conference_Titel
Superconductive Electronics Conference (ISEC), 2015 15th International
Type
conf
DOI
10.1109/ISEC.2015.7383446
Filename
7383446
Link To Document