Design of an on-interposer passive equalizer embedded on a ground plane for 30Gbps serial data transmission

In this paper, a new on-interposer passive equalizer was proposed for chip-to-chip high-speed serial data transmission. It is a coil-shaped shunt metal line and embedded on a ground plane to maximize channel routability. Since the proposed equalizer is based on the fine pitch design rules of silicon interposer, it can be integrated in a small area. Equalizing method is based on a high pass filter composed of an inductance and a resistance of the proposed structure. It achieves wide-band equalization up to data rate of 30 Gbps. Performance of the proposed equalizer is verified using frequency- and time-domain simulation. By applying the proposed equalizer to 30 Gbps channel, eye-height was improved by 13.4 % of input voltage and timing jitter was reduced by 5.5 % of one unit interval.