Title :
A high-performance vertical substrate noise isolation method for 3D ICs
Author :
Jia-Yi Wu;Yong-Wei Chen;Mu-Shui Zhang;Hong-Zhou Tan
Author_Institution :
School of Information Science and Technology, Sun Yat-sen University, Guangzhou, China
Abstract :
In this paper, we have developed a new structure to suppress 3D noise coupling in 3D silicon substrates. This technique consists of contact arrays and grid ground planes. The contact arrays suppress the low-frequency noise while the grid ground suppresses the high-frequency noise. This isolation method can be used for noise suppression between circuits and/or TSVs, and it can be applied in 3D ICs with multiple dies. This method is more efficient compared to guard rings. Results show that it has significant and stable performance.
Keywords :
"Substrates","Couplings","Three-dimensional displays","Structural rings","Periodic structures","Through-silicon vias"
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2015 IEEE
DOI :
10.1109/EDAPS.2015.7383698
