Title :
A cell current compensation scheme for 3D NAND FLASH memory
Author :
SungWook Choi;KyuTae Park;Marco Passerini;HeeJoung Park;DoYoung Kim;ChiHyun Kim;KunWoo Park;JinWoong Kim
Author_Institution :
FLASH Development Division, SKHynix, 2091 Gyeongchung-daero Bubal-eupIcheon-siGyeonggi-do, Korea
Abstract :
The 3D NAND, so-called vertical NAND has cell Vt degradation especially in low temperature, and it affects cell Vt distribution and shift when NAND operates. To solve this problem, the temperature compensation scheme by ATS(Analog Temp Sensor) using CTAT circuit has proposed. The temperature compensated bias controls the bit line level to generate temperature compensated cell Vt distribution. The proposed scheme has been implemented in 36 stacks, 256Gb MLC NAND and proved its effect in silicon wafer.
Keywords :
"Three-dimensional displays","Temperature sensors","Temperature distribution","Flash memories","Temperature control","Computer architecture"
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian
DOI :
10.1109/ASSCC.2015.7387432
