DocumentCode :
3733914
Title :
A 1V fractional-N PLL with nonlinearity-insensitive modulator
Author :
Yi-Chieh Huang;Che-Fu Liang;Ping-Ying Wang
Author_Institution :
MediaTek Inc., Hsinchu, Taiwan
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
A 1V fractional-N PLL is proposed in 40nm technology. With modified VCO, it can be operated under 1V supply with wide tuning range and low supply sensitivity. Besides, conventional 3rd MASH SDM is sensitive to nonlinearity caused by analog path, generating in-band fractional spur that cannot be filtered by PLL loop. In order to lower the sensitivity to nonlinearity, a new type of modulator is proposed. Theorem derivation and simulation results show that this modulator is insensitive to 2nd-5th order nonlinearity. The measured in-band worst-case fractional and reference spur are -64.5dBc and -81dBc, respectively. The RMS jitter is 3.91ps under 5.85mW power consumption.
Keywords :
"Phase locked loops","Frequency measurement","Frequency modulation","Voltage-controlled oscillators","Sensitivity","Phase modulation"
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian
Type :
conf
DOI :
10.1109/ASSCC.2015.7387447
Filename :
7387447
Link To Document :
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