DocumentCode
3734463
Title
Dual-switch power gating technique with small energy loss, low area, short crossover time, and fast wake-up time for fine-grain leakage controlled VLSIs
Author
Minh-Huan Vo;Ai-Quoc Dao
Author_Institution
Faculty of Electrical and Electronics Engineering, HCMC University of Technology and Education, Vietnam
fYear
2015
Firstpage
264
Lastpage
269
Abstract
In this paper, we compared various power gating schemes in terms of energy loss, crossover time, and wake-up time using the 45-nm Predictive Technology Model. In this comparison, the Dual-Switch Power Gating (DSPG) shows smaller energy loss, shorter crossover time, faster wake-up time than the other power gating schemes such as the Single-Switch and Charge-Recycled Power Gating schemes. Based on these advantages, the DSPG is suggested in this paper as a viable candidate suitable to a fine-grain leakage control scheme, where logic blocks go in and out very frequently and shortly between the active and sleep modes.
Keywords
"Switching circuits","Energy loss","Logic gates","Leakage currents","Switches","Predictive models","IEEE 802.16 Standard"
Publisher
ieee
Conference_Titel
Advanced Technologies for Communications (ATC), 2015 International Conference on
ISSN
2162-1020
Print_ISBN
978-1-4673-8372-1
Type
conf
DOI
10.1109/ATC.2015.7388332
Filename
7388332
Link To Document