• DocumentCode
    3734568
  • Title

    DC-DC converter power stage with cascoded transistors and automatic dead time generation

  • Author

    I.M. Filanovsky;J.K. J?rvenhaara;N.T. Tchamov

  • Author_Institution
    University of Alberta, Edmonton, Canada
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The paper presents a cascoded power stage with automatic dead time generation. The circuit is using the inter-transistor node voltages of the cascode configuration as feedback control signals to delay turning ON the power transistors. The circuit is designed as the output stage of a fully-integrated buck converter. The steady-state operation is described. The waveforms simulated on 45-nm CMOS process show that in steady-state operation the short-circuit path and body diode conductions are avoided while effective zero-voltage switching (ZVS) are provided both for ground and power supply line; the calculated dead times are in a good agreement with simulation results.
  • Keywords
    "Transistors","Inductors","Turning","Logic gates","Capacitance","Delays","Power transistors"
  • Publisher
    ieee
  • Conference_Titel
    Design of Circuits and Integrated Systems (DCIS), 2015 Conference on
  • Type

    conf

  • DOI
    10.1109/DCIS.2015.7388560
  • Filename
    7388560