DocumentCode :
3734695
Title :
Investigation and benchmark of intrinsic drain-induced-barrier-lowering (DIBL) for ultra-thin-body III?V-on-insulator n-MOSFETs
Author :
Chang-Hung Yu;Pin Su
Author_Institution :
Department of Electronics Engineering & Institute of Electronics, National Chiao Tung University, Taiwan
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
666
Lastpage :
669
Abstract :
The intrinsic drain-induced-barrier-lowering (DIBL) characteristics of ultra-thin-body (UTB) MOSFETs with various III-V channel materials (such as GaAs, In0.53Ga0.47As, In0.7Ga0.3As, InAs, In0.2Ga0.8Sb, InSb, etc.) has been investigated and benchmarked with the Si device. Our results indicate that the DIBL of the III-V-on-insulator devices can be worse than what permittivity predicts. The underlying mechanism is proposed. We also show that, with the aid of quantum confinement (along the channel-thickness direction), the DIBL of the III-V devices can be comparable to the Si device.
Keywords :
"Silicon","III-V semiconductor materials","Benchmark testing","Permittivity","Potential well","MOSFET circuits","MOSFET"
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO) , 2015 IEEE 15th International Conference on
Type :
conf
DOI :
10.1109/NANO.2015.7388693
Filename :
7388693
Link To Document :
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