DocumentCode
3734696
Title
Tunneling: The major issue in ultra-scaled MOSFETs
Author
Mehdi Salmani Jelodar;Hesameddin Ilatikhameneh;Prasad Sarangapani;Saumitra R. Mehrotra;Gerhard Klimeck;SungGuen Kim;Kwok Ng
Author_Institution
Network for Computational Nanotechnology, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA
fYear
2015
fDate
7/1/2015 12:00:00 AM
Firstpage
670
Lastpage
673
Abstract
As transistors scale below 10 nm, the numbers of atoms and electrons are countable in the critical device areas. At this scale, quantum mechanical phenomena start playing an important role in the performance of the transistors. One of the major quantum mechanical effects is tunneling; i.e. tunneling between the gate and channel due to the reduction of physical oxide layer thickness and direct tunneling between the source and drain due to scaling down of channel length. This paper discusses these tunneling issues on performance of ultra-scaled transistors based on rigorous atomistic simulations and provides some solutions for scaling based on a quantitative analysis.
Keywords
"Tunneling","Logic gates","High K dielectric materials","Performance evaluation","Leakage currents","MOSFET"
Publisher
ieee
Conference_Titel
Nanotechnology (IEEE-NANO) , 2015 IEEE 15th International Conference on
Type
conf
DOI
10.1109/NANO.2015.7388694
Filename
7388694
Link To Document