Design of NML Circuits based on M-RAM

NanoMagnet Logic (NML) is an emerging technology that allows to design digital circuits using nanomagnets. Each magnet has only two possible states and encodes digital information without the need for currents or voltages. This behavior differentiates NML circuits from charge based technologies. The advantages provided by NML circuits are a possible very low power consumption, and the ability to mix logic and memory in the same device. While a rich experimental activity on NML circuits can be found in literature, the feasibility of a complete NML system remains to be demonstrated yet. In this work we explore the possibility of implementing NML logic circuits based on the physical structure of Magnetic RAM (M-RAM). The advantages are twofold: First, M-RAM is a well developed technology, ready for the commercial stage, second it intrinsically provides an interface toward the CMOS world. To demonstrate the feasibility of NML circuits based on M-RAM we have designed a 3-input Ex-OR gate, using two different physical layouts for control signals. The first solution is strictly based on the M-RAM structure; the second solution requires a more complex fabrication process but leads to a smaller area. Circuits are simulated using VHDL language, with the aid of a tool that we have developed which automatically generates the VHDL code starting from the circuit layout. Overall, the solution here presented is a considerable step-forward toward the development of a complete magnetic circuit.