DocumentCode
3734958
Title
Modeling self-heating in nanoscale devices
Author
Dragica Vasileska
Author_Institution
School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, 85287-5706, United States
fYear
2015
fDate
7/1/2015 12:00:00 AM
Firstpage
200
Lastpage
203
Abstract
In this paper, a review is presented on the self-heating modeling efforts performed at Arizona State University. In the analysis, first simple SOI Devices are being considered from different technology generations to illustrate what we call “Thermal Landauer picture”. Namely, it is demonstrated via numerical simulations that in the shortest devices the hot spot does not occur in the channel (as it was speculated in previous works), but occurs in the drain contact due to the largely ballistic nature of the carrier transport. Impact of self-heating effects is also examined in dual-gate devices and silicon nanowire transistors.
Keywords
"Phonons","Silicon","Heating","Optical scattering","Logic gates","Thermal conductivity"
Publisher
ieee
Conference_Titel
Nanotechnology (IEEE-NANO) , 2015 IEEE 15th International Conference on
Type
conf
DOI
10.1109/NANO.2015.7388957
Filename
7388957
Link To Document