DocumentCode :
3735727
Title :
Low-temperature refill process for through-silicon-vias (TSVs) in stacked ultra-thin chip-on-wafer by Aerosol Jet printed silver
Author :
Saleh Ferwana;J?rgen Keck;Mahadi-Ul Hassan;Christine Harendt;J. N. Burghartz
Author_Institution :
Institut f?r Mikroelektronik Stuttgart (IMS CHIPS), Allmandring 30a, 70569 Stuttgart, Germany
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
The filling process of Through-Silicon Via (TSV) based on printed silver using the Aerosol Jet™ method is presented and discussed. TSVs with different diameters as via-last process in 18 μm ultra-thin ChipFilm™ dies, including a self-aligned etching process and their passivation are demonstrated. Daisy chain test structures on top of ChipFilm™ dies and on the bottom wafer are used for demonstration purposes. Moreover, the successful 3D-integration of an 18 μm ChipFilm™ die on the wafer using patterned photosensitive BCBs including a plasma treatment step right before stacking is presented. Finally, the work is concluded by demonstrating the results of electrical characterization of the filled and annealed TSVs at 180°C.
Keywords :
"Through-silicon vias","Etching","Cavity resonators","Fabrication","Passivation","Silicon","Substrates"
Publisher :
ieee
Conference_Titel :
Microelectronics Packaging Conference (EMPC), 2015 European
Type :
conf
Filename :
7390750
Link To Document :
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