Title :
An efficient hardware implementation of sequential stack decoding of binary block codes
Author :
J?rgen Freudenberger;Thomas Wegmann;Jens Spinner
Author_Institution :
HTWG Konstanz, University of Applied Sciences, Konstanz, Germany Institute for System Dynamics (ISD)
Abstract :
This work proposes an efficient hardware Implementation of sequential stack decoding of binary block codes. The decoder can be applied for soft input decoding for generalized concatenated (GC) codes. The GC codes are constructed from inner nested binary Bose-Chaudhuri-Hocquenghem (BCH) codes and outer Reed-Solomon (RS) codes. In order to enable soft input decoding for the inner BCH block codes, a sequential stack decoding algorithm is used.
Keywords :
"Decoding","Measurement","Block codes","AWGN channels","Read only memory","Bit error rate"
Conference_Titel :
Consumer Electronics - Berlin (ICCE-Berlin), 2015 IEEE 5th International Conference on
DOI :
10.1109/ICCE-Berlin.2015.7391215
