DocumentCode
3736255
Title
Mismatch-tolerant time amplifier with embedded self-calibration
Author
Jung-Chin Lai;Terng-Yin Hsu
Author_Institution
Computer Science and Engineering, National Chiao Tung University, Hsinchu, Taiwan
fYear
2015
Firstpage
393
Lastpage
396
Abstract
This paper presents a reliable self-calibration scheme to reduce the mismatches of SR-Latch based 6X time amplifier (TA) to enhance the resolution of time-to-digital converter (TDC). The proposed calibration is embedded to compensate for process, voltage and temperature (PVT) variations that it can eliminate the gain error caused by input mismatches. With the proposed TA, a standard cyclic TDC implemented in UMC 65-nm CMOS process shows that the resolution is 1.25ps.
Keywords
"Tin","Calibration","Delays","Radiation detectors","Registers","Jitter"
Publisher
ieee
Conference_Titel
Consumer Electronics - Berlin (ICCE-Berlin), 2015 IEEE 5th International Conference on
Type
conf
DOI
10.1109/ICCE-Berlin.2015.7391289
Filename
7391289
Link To Document