DocumentCode :
3738823
Title :
Reduction of coupling capacitance, using a capacitor-transistor coupling circuit
Author :
Majid Eslami Farsani;Noushin Ghaderi
Author_Institution :
Faculty of Engineering, Shahrekord University, Shahrekord, Iran, 88186/34141
fYear :
2015
Firstpage :
106
Lastpage :
109
Abstract :
In this paper, a new coupling circuit is presented. This circuit uses a new method of subthreshold region biasing to decrease the value of coupling capacitor. In proposed circuit the Coupling capacitor is decreased about 98% in comparison with the ordinary capacitive coupling circuit. In addition, the proposed coupling circuit achieves higher linearity. The performance evaluation of proposed circuit is carried out using HSPICE simulations, 180nm technology and 1.8V power supply.
Keywords :
"Couplings","Coupling circuits","Capacitors","Cutoff frequency","Transistors","Mathematical model","Simulation"
Publisher :
ieee
Conference_Titel :
Electrical and Electronics Engineering (ELECO), 2015 9th International Conference on
Type :
conf
DOI :
10.1109/ELECO.2015.7394649
Filename :
7394649
Link To Document :
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