FPGA-based design and implementation of a phase detector to correct the I/Q imbalance

This paper describes the design and implementation of a system to evaluate the I/Q modulation when phase and amplitude imperfections are added. This system allows observing the signal behavior in the presence of phase and amplitude imbalance. An approach to correct I/Q imbalances using a power detector is proposed, by means calculating peak impairments in the interest signal and phase shifting is detected. Phase shift stability is introduced for correcting (I or Q) branches respectively to guarantee amplitude and phase balancing condition in the modulator output. Experimental results are implemented employing an FPGA by using DSP-Builder to bit true VHDL hardware description of proposed model. The modulated signal with the constellation and measurements in the oscilloscope is compared.