DocumentCode :
3740062
Title :
High level NoC modeling using discrete event simulation
Author :
Nejib Mediouni;Samir Ben Abid;Oussama Kallel;Salem Hasnaoui
Author_Institution :
Communication System Laboratory Sys´Com, National Engineering School Of Tunis, University Tunis El Manar
fYear :
2015
Firstpage :
143
Lastpage :
144
Abstract :
Planning and evaluating a Network on Chip (NoC) for a specific application is usually a complex task that requires the collaboration of both hardware and software specialists. Predicting the performance of the devised architecture and solution is both difficult in nature and time consuming. In this paper we present a high level model for five-port router based NoCs using Matlab´s SimEvents toolbox. The presented model is used to construct a 4 × 4 mesh NoC and evaluated the usual performance metrics like latency and throughput.
Keywords :
"Routing","Generators","Ports (Computers)","Clocks","MATLAB"
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (IDT), 2015 10th International
Type :
conf
DOI :
10.1109/IDT.2015.7396752
Filename :
7396752
Link To Document :
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