DocumentCode
3740860
Title
Standard cell implementation of buskeeper PUF with symmetric inverters and neighboring cells for passing randomness tests
Author
Yasuhiro Ogasahara;Yohei Hori;Hanpei Koike
Author_Institution
AIST, Tsukuba 305-8568, Japan
fYear
2015
Firstpage
550
Lastpage
551
Abstract
In this paper, from the measurement results on silicon, we validate that symmetric inverters placement including neighboring cells of buskeeper PUF achieves not only fine uniqueness but also sufficient randomness which was not presented in past works. We also demonstrate that our symmetric implementation enables fine PUF performance regardless of pMOS and nMOS width of inverters in foundry-dependent standard cell libraries. Our measurement results of 65280 bit buskeeper PUFs with suggested design on silicon passed 10 randomness tests, and achieved 2.118% within-class HD, μ=0.5001 and σ=0.0359 class-to-class HD, and 0.9992 entropy/bit.
Keywords
"High definition video","Inverters","MOS devices","Semiconductor device measurement","Layout","Standards","Logic gates"
Publisher
ieee
Conference_Titel
Consumer Electronics (GCCE), 2015 IEEE 4th Global Conference on
Type
conf
DOI
10.1109/GCCE.2015.7398553
Filename
7398553
Link To Document