Substrate noise suppression method analysis of integrated circuit

With the development of the large-scale System On Chip, the chip´s integration is higher. A big potential risk for the performance of System On Chip is the substrate noise. The substrate noise has received extensive attention. The paper analyzes a simple mixed digital-analog circuit whose digital circuit is an inverter and the analog circuit is an amplifier. This paper analyzes three substrate noise suppression methods: add the guard rings, increase the distance between analog and digital circuits and add the complementary circuit of the digital circuit. Based on the circuit simulation, the paper discusses the impacts of the substrate noise on the circuits without suppression methods and with different suppression methods, and analyzes the impacts on the amplifier´s gain. By comparing the three suppression methods, increase the distance between the analog and digital circuits is the best method on suppressing the substrate noise.