DocumentCode :
3741320
Title :
Compiler for a simplified programming language aiming on Multi Core Students´ Experimental Processor
Author :
Y M R D Wepathana;G Anthonys;L S K Udugama
Author_Institution :
Department of Electrical and Computer Engineering, Faculty of Engineering Technology, The Open University of Sri Lanka, Sri Lanka
fYear :
2015
Firstpage :
284
Lastpage :
289
Abstract :
Knowledge of parallel programming is an essential requirement in multicore era. To meet this requirement, teaching parallel programming is important at university level. Further, students should have an exposure to different parallel architectures and programming models as well. In order to achieve this objective, it is appropriate to use an integrated system having different parallel architectures and supporting programming languages. Though it is difficult to find a system as stated above, Multi Core Students Experimental Processor (MCSEP) designed on the base of Students Experimental Processor provides an opportunity to develop such system. The MCSEP can be configured to one of the five architectures: SISD, SIMD, MIMD, Multiple-SIMD, and Multiple-MIMD. Each architecture can further be configured to one of six Instruction Set Architectures: Memory-Memory, Accumulator, Extended Accumulator, Stack, Register Memory, and Load Store. As there are no programming tools for the MCSEP, a compiler and a simplified programming language, SEPCom has been developed for using all the features of the multicore processor MCSEP. The SEPCom is a Java like programming language with parallel programming features. The test results show that SEPCom performs well in all architectures available in the MCSEP. Therefore SEPCom can be used for writing parallel programs for different parallel architectures. Consequently, students can develop appropriate programs to do their experiments, and moreover to analyze and measure performances in different parallel architectures. Further, students can also use it as a case study for learning compiler design.
Keywords :
"Programming","Yttrium","Computational modeling","Program processors","Integrated circuits","IP networks","Registers"
Publisher :
ieee
Conference_Titel :
Industrial and Information Systems (ICIIS), 2015 IEEE 10th International Conference on
Print_ISBN :
978-1-5090-1741-6
Type :
conf
DOI :
10.1109/ICIINFS.2015.7399025
Filename :
7399025
Link To Document :
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