• DocumentCode
    3742601
  • Title

    The refined mCBE algorithm for efficient constants multipliers architecture

  • Author

    Rachmad Vidya Wicaksana Putra;Trio Adiono

  • Author_Institution
    Microelectronics Center, Institut Teknologi Bandung, Indonesia
  • fYear
    2015
  • Firstpage
    129
  • Lastpage
    130
  • Abstract
    In digital hardware, multiplication is frequently used for digital signal processing. We found that there are calculations which need several constants multipliers for the same data. Hence, we developed a multiplication from common binary expression (mCBE) algorithm in order to minimize the number of shifter-adder components to substitute multipliers. Actually, the first generation of the mCBE algorithm has been proposed before. However, it is optimally designed for DCT/IDCT processing. In this paper, we proposed the refined mCBE algorithm, the second generation (mCBEv2), to comply general constants multiplication characteristics. It is based on the constants binary decomposition and designed to establish an efficient multiplication architecture.
  • Keywords
    "Algorithm design and analysis","Signal processing algorithms","Computer architecture","Hardware","Adders","Classification algorithms","Microelectronics"
  • Publisher
    ieee
  • Conference_Titel
    SoC Design Conference (ISOCC), 2015 International
  • Type

    conf

  • DOI
    10.1109/ISOCC.2015.7401670
  • Filename
    7401670