DocumentCode :
3742613
Title :
Reliability-aware design automation flow for analog circuits
Author :
Chien-Nan Jimmy Liu;Yen-Lung Chen;Tsung-Yu Liu;Tai-Chen Chen
Author_Institution :
Dept. of Electrical Engineering, National Central University, Jung-Li City, Taiwan, ROC
fYear :
2015
Firstpage :
1
Lastpage :
2
Abstract :
Manually designing analog circuits is often considered as a difficult task that takes a lot of time. If a design automation environment is available for analog circuits, it is useful for designers to cope with the increasing challenges in advance process. In this paper, a reliability-aware circuit sizing technique is proposed to consider process variation, circuit aging, and layout-dependent effects simultaneously. A reliability-aware analog layout automation technique is also proposed to consider both placement and routing while improving the reliability of the generated layout. These reliability-aware design automation techniques have been integrated to build a complete synthesis environment from specifications to layout. As shown in the experimental results, the proposed automation flow does help designers solve the reliability issues efficiently.
Keywords :
"Reliability","Layout","Analog circuits","Aging","Routing","Design automation","Automation"
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2015 International
Type :
conf
DOI :
10.1109/ISOCC.2015.7401682
Filename :
7401682
Link To Document :
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