DocumentCode :
3742623
Title :
A static bidirectional learning technique to accelerate test pattern generation
Author :
Jiun-Han Pan;Kuen-Wei Yeh;Jiun-Lang Huang
Author_Institution :
Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
fYear :
2015
Firstpage :
45
Lastpage :
46
Abstract :
Learning is a very effective technique to speed up the test pattern generation process. In this paper, we propose a static bidirectional learning technique that significantly increases the number of learned implications. The proposed bidirectional learning is integrated into PODEM. Experiment results show that, compared to previous static learning, in average the number of learned implications increases by 10%, and the CPU times are reduced by 24%.
Keywords :
Frequency locked loops
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2015 International
Type :
conf
DOI :
10.1109/ISOCC.2015.7401692
Filename :
7401692
Link To Document :
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