Configurable MIMO symbol detector for wireless communication systems

In this paper, an area-efficient and fully-configurable multiple input multiple output (MIMO) symbol detector with four transmit and four receive antennas is proposed. The proposed symbol detector can support both spatial multiplexing mode and spatial diversity mode with various modulation and antenna configurations in single hardware. The proposed symbol detector was designed in hardware description language (HDL) and synthesized to gate-level circuits using 65nm CMOS standard cell library. The total logic gates of the proposed soft-output MIMO symbol detector are 517K with 270-MHz clock frequency.