DocumentCode :
3742679
Title :
A variable-gain time amplifier with automatic interval detection
Author :
Frank Hsiao;Jung-Chin Lai;Terng-Yin Hsu
Author_Institution :
Computer Science and Engineering, National Chiao Tung University, Hsinchu, Taiwan
fYear :
2015
Firstpage :
263
Lastpage :
264
Abstract :
This paper presents an all-digital standard cell SR-Latch based time amplifier (TA) with a variable gain of 6X and 12X. In this TA, a two-stage gain selection unit is applied to enable the TA to select either the high gain for short input pulse intervals or the low gain for long input pulse intervals. The time amplification gain is 6 in the input range of -700ps ~700ps, and reaches 12 if the input range is -300~300ps. We present a design that automatically detects the input pulse and switches to the proper TA gain. By applying the proposed TA, a standard cyclic TDC implemented in a UMC CMOS 65-nm process shows the resolution improved from 1.6ps to 0.8 ps.
Keywords :
"Delays","Detectors","Gain","Multiplexing","Propagation delay","Tin","Standards"
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2015 International
Type :
conf
DOI :
10.1109/ISOCC.2015.7401748
Filename :
7401748
Link To Document :
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